PCI-e loopback card

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The PCI-e loopback card is a PCI-e gen 2 capable device designed to test PCI-e slots. It has x1 and x4 PCI-e edge connectors for testing x1 and x4 PCI-e host slots up to PCI-e gen 2 speeds.

The x1 link connector (top of the diagram below) is designed to test x1 PCIe gen2 capable slots, but may also be used in larger PCIe slots.

The x4 link connector (bottom of the diagram below) is designed to test x4 to x16 PCIe gen2 capable slots.

 

The card also includes a PSU connector to enable the monitoring of the PSU (Power Supply Unit). Please note that the PSU connector is not required to power the PCI-e loopback card and is only used to monitor PSU voltages.

 

pcie1

 

 

A PCIe loopback card can be inserted in each PCIe slot.

 

On powering the system, a "Loopback" device category will be displayed in device manager and the PassMark PCIe loopback card device driver will need to be installed. This is available from the PassMark Software website.

 

The PassMark PCIe loopback card provides the following quick LED indications:

Front of card:

PCIe LEDs1

Five 12V PCIe green voltage LEDs. One 12V red failure LED.

Three 3.3V PCIe green voltage LEDs. One 3.3V red failure LED.

Two PSU green voltage LEDs and two red failure LEDs.

When connected to a working PCIe slot with the PSU connector attached, the green LEDs should be lit, and the red LEDs not lit.

Back of card:

PCIe LEDs2

One TX (transmit) green LED. One RX (receive) orange LED. These should be lit during testing.

One red I/O error. Should not be lit when the PCIe slot is operating correctly.

One Sleep LED.

One Gen2/3 LED.

Three test mode LEDs: Loop, Bench and Voltage. The current test mode: loopback, benchmarking or reading voltages will determine which LED is lit.

 

Loopback and Benchmark modes

 
The PCIeTest (or BurnInTest) application on the host PC initiates DMA transfers and the embedded PCIe core initiates the Advanced eXtensible Interface (AXI) transactions through the AXI master interface to the DMA controller in the FPGA fabric on the test card. The DMA controller has two independent channels for the AXI read/write channels of the PCIe AXI slave interface. The DMA controller in the FPGA fabric initiates the DMA channels depending on the type of the DMA transfer. Each channel has a timer for calculating the throughput and has 4KB of LSRAM buffer.

-DMA channel 0 handles DMA transfers from Host PC memory to LSRAM.
-DMA channel 1 handles DMA transfers from LSRAM to Host PC memory.
-A loopback mode uses both DMA channels starting with a Host PC memory to LSRAM transaction immediately followed by an LSRAM to Host PC transaction
-Benchmarking modes will include Read, Write, Read then Write and Read& Write. The measured throughput is the measured throughput to/from the PCIe test card and provides an indication of the PCIe slot throughput. The test card can load up small amounts of data to be received quickly, but if the bus doesn’t keep up then the buffer quickly fills and the transfer speed trends towards the underlying bus speed. Also, the PCIe test card hardware is limited to throughput of about 1200MB/s.
-Throughput is obtained by reading the control status registers for CH0 and CH1.

-DMA Transactions are initiated through read/write and IOCTL requests to the driver. The driver then writes the appropriate 32-bit values to DMA control registers.