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USB3.0 Loopback plug hardware revision 2 - Announcement

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  • USB3.0 Loopback plug hardware revision 2 - Announcement

    We are releasing the second hardware revision for our USB3.0 loopback plugs today.

    Hardware revision 2 is being introduced to double the memory on the device, reduce power usage, provide better electrostatic protection (ESD) & reduce electrical noise. This should reduce error rates when used with marginal host controllers or marginal cabling. Otherwise the high level functionality of Rev 1 and Rev 2 are identical. There is also no change in the price.


    The below table summarizes the main differences across revisions.
    Feature HW Revision 1 HW Revision 2
    Memory 256KB 512KB
    For additional functionality in future firmware
    Clock 19.2Mhz (crystal) 19.2Mhz (oscillator)
    For reduced electrical noise
    ESD Protection on VBUS ESD, IEC 61000-4-2, 8kV contact, 5kV air discharge ESD, IEC 61000-4-2, 30kV contact, 30kV air discharge
    EFT, IEC 61000-4-4, 40A (5/50ns)
    ESD Protection on USB2 lines ESD, IEC61000-4-2 level 3A, 6kV contact, 8-kV air discharge
    ESD, IEC61000-4-2 level 4C, 8kV contact, 15-kV air discharge
    ESD, IEC 61000-4-2, 20kV contact, 30kV air discharge
    EFT, IEC 61000-4-4, 40A (5/50ns)
    ESD Protection on USB3 lines ESD, IEC61000-4-2, 20kV contact, 20kV air discharge ESD, IEC 61000-4-2 Level 4, 12kV contact, 15-kV air discharge
    EFT, IEC 61000-4-4, 80 A (5/50 ns)
    Voltage Protection 28V 26V
    On board voltage regulators 1.2 (linear regulator), 3.3 (linear regulator) 1.2 (switching regulator), 3.3 (linear regulator)
    Power Consumption 115mA (Typical USB 2.0 operation)
    170mA (Typical USB 3.0 operation)
    75mA (Typical USB 2.0 operation)
    90mA (Typical USB 3.0 operation)
    In addition to the above-mentioned differences, in the new revision:
    • The on-board power supply is redesigned to achieve better stability and less sensitivity to noise on VBUS
    • The board stackup is changed and signal integrity is improved
    • An optional ground point is added to provide a low-impedance path when the plug is exposed to ESD/EFT events (ESD/EFT testing is not recommended as the protection chips degrades when they are exposed to ESD/EFT events)
    • LCD connector is moved to the bottom layer to prevent damage to the LCD caused by components attached to the FPC cable
    • Different model coloured LEDs, as the previous componenets were no longer available.

  • #2
    So power usage under load has been reduced by nearly 50%. This allows the device to work on lower powered devices and also lowers the operating temperatures. This thermal image shows the difference between the heat dissipation after 15min run time. Maximum temperatures have been reduced from 49C to 34C


    Hardware revision 1
    Thermal image of USB3 loopback plug


    Hardware revision 2

    Thermal image of USB3 loopback plug revision 2






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