Data Structures | Data Fields

SPDINFO::SPECIFICINFO::DDR2SDRAMINFO Struct Reference

DDR2-specific attributes. More...

#include <SysInfo.h>

Data Structures

struct  EPPInfo
 EPP-specific attributes. More...

Data Fields

float tAC
 Data access time from clock.
float tCKmed
 Clock cycle time at medium CAS latency in ns.
float tACmed
 Data access time at medium CAS latency in ns.
float tCKshort
 Clock cycle time at short CAS latency in ns.
float tACshort
 Data access time at short CAS latency in ns.
float tCKmax
 Maximum clock cycle time in ns.
float tWR
 Write recovery time in ns.
float tWTR
 Internal write to read command delay in ns.
float tRTP
 Internal read to precharge command delay in ns.
float tIS
 Address/Command Setup Time before clock in ns.
float tIH
 Address/Command Hold Time after clock in ns.
float tDS
 Data Input Setup Time before strobe in ns.
float tDH
 Data Input Hold Time after strobe in ns.
float tDQSQ
 Maximum skew between DQS and DQ signals in ns.
float tQHS
 Maximum Read Data Hold Skew Factor in ns.
float tPLLRelock
 PLL Relock Time in ns.
wchar_t DRAMPackage [VSHORT_STRING_LEN]
 DRAM Package type.
wchar_t BurstLengthsSupported [SHORT_STRING_LEN]
 Burst Lengths supported.
wchar_t RefreshRate [SHORT_STRING_LEN]
 Refresh rate.
int numPLLs
 Number of PLLs on DIMM.
bool FETExtEnable
 TRUE for FET Switch External Enable.
bool AnalysisProbeInstalled
 TRUE for Analysis probe installed.
bool WeakDriverSupported
 TRUE for Weak Driver supported.
bool _50ohmODTSupported
 TRUE for 50 ohm ODT supported.
bool PASRSupported
 TRUE for Partial Array Self Refresh supported.
wchar_t moduleType [SHORT_STRING_LEN]
 Module type.
wchar_t moduleHeight [VSHORT_STRING_LEN]
 Module height.
bool EPPSupported
 TRUE if Enhanced Performance Profiles (EPP) supported.
struct
SPDINFO::SPECIFICINFO::DDR2SDRAMINFO::EPPInfo 
EPP
 EPP-specific attributes.

Detailed Description

DDR2-specific attributes.


Field Documentation

float tAC

Data access time from clock.

float tCKmed

Clock cycle time at medium CAS latency in ns.

float tACmed

Data access time at medium CAS latency in ns.

float tCKshort

Clock cycle time at short CAS latency in ns.

float tACshort

Data access time at short CAS latency in ns.

float tCKmax

Maximum clock cycle time in ns.

float tWR

Write recovery time in ns.

float tWTR

Internal write to read command delay in ns.

float tRTP

Internal read to precharge command delay in ns.

float tIS

Address/Command Setup Time before clock in ns.

float tIH

Address/Command Hold Time after clock in ns.

float tDS

Data Input Setup Time before strobe in ns.

float tDH

Data Input Hold Time after strobe in ns.

float tDQSQ

Maximum skew between DQS and DQ signals in ns.

float tQHS

Maximum Read Data Hold Skew Factor in ns.

float tPLLRelock

PLL Relock Time in ns.

wchar_t DRAMPackage[VSHORT_STRING_LEN]

DRAM Package type.

wchar_t BurstLengthsSupported[SHORT_STRING_LEN]

Burst Lengths supported.

wchar_t RefreshRate[SHORT_STRING_LEN]

Refresh rate.

int numPLLs

Number of PLLs on DIMM.

TRUE for FET Switch External Enable.

TRUE for Analysis probe installed.

TRUE for Weak Driver supported.

TRUE for 50 ohm ODT supported.

TRUE for Partial Array Self Refresh supported.

wchar_t moduleType[SHORT_STRING_LEN]

Module type.

wchar_t moduleHeight[VSHORT_STRING_LEN]

Module height.

TRUE if Enhanced Performance Profiles (EPP) supported.

EPP-specific attributes.


The documentation for this struct was generated from the following file:
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