Data Fields

SPDINFO::SPECIFICINFO::DDR1SDRAMINFO Struct Reference

DDR-specific attributes. More...

#include <SysInfo.h>

Data Fields

float tAC
 Data access time from clock.
float tCKmed
 Clock cycle time at medium CAS latency in ns.
float tACmed
 Data access time at medium CAS latency in ns.
float tCKshort
 Clock cycle time at short CAS latency in ns.
float tACshort
 Data access time at short CAS latency in ns.
float tCKmax
 Maximum clock cycle time in ns.
float tIS
 Address/Command Setup Time before clock in ns.
float tIH
 Address/Command Hold Time after clock in ns.
float tDS
 Data Input Setup Time before strobe in ns.
float tDH
 Data Input Hold Time after strobe in ns.
float tDQSQ
 Maximum skew between DQS and DQ signals in ns.
float tQHS
 Maximum Read Data Hold Skew Factor in ns.
wchar_t CSSupported [SHORT_STRING_LEN]
 CS latencies supported.
wchar_t WESupported [SHORT_STRING_LEN]
 WE latencies supported.
wchar_t BurstLengthsSupported [SHORT_STRING_LEN]
 Burst Lengths supported.
wchar_t RefreshRate [SHORT_STRING_LEN]
 Refresh rate.
bool buffered
 TRUE for buffered address/control inputs.
bool OnCardPLL
 TRUE for on-card PLL.
bool FETOnCardEnable
 TRUE for FET Switch On-Card Enable.
bool FETExtEnable
 TRUE for FET Switch External Enable.
bool DiffClockInput
 TRUE for Differential Clock Input.
bool WeakDriverIncluded
 TRUE for Weak Driver included.
bool ConcAutoPrecharge
 TRUE for Concurrent Auto Precharge supported.
bool FastAPSupported
 TRUE for Fast AP supported.
wchar_t bankDensity [VSHORT_STRING_LEN]
 Module bank density.
wchar_t moduleHeight [VSHORT_STRING_LEN]
 Module height.

Detailed Description

DDR-specific attributes.


Field Documentation

float tAC

Data access time from clock.

float tCKmed

Clock cycle time at medium CAS latency in ns.

float tACmed

Data access time at medium CAS latency in ns.

float tCKshort

Clock cycle time at short CAS latency in ns.

float tACshort

Data access time at short CAS latency in ns.

float tCKmax

Maximum clock cycle time in ns.

float tIS

Address/Command Setup Time before clock in ns.

float tIH

Address/Command Hold Time after clock in ns.

float tDS

Data Input Setup Time before strobe in ns.

float tDH

Data Input Hold Time after strobe in ns.

float tDQSQ

Maximum skew between DQS and DQ signals in ns.

float tQHS

Maximum Read Data Hold Skew Factor in ns.

wchar_t CSSupported[SHORT_STRING_LEN]

CS latencies supported.

wchar_t WESupported[SHORT_STRING_LEN]

WE latencies supported.

wchar_t BurstLengthsSupported[SHORT_STRING_LEN]

Burst Lengths supported.

wchar_t RefreshRate[SHORT_STRING_LEN]

Refresh rate.

bool buffered

TRUE for buffered address/control inputs.

bool OnCardPLL

TRUE for on-card PLL.

TRUE for FET Switch On-Card Enable.

TRUE for FET Switch External Enable.

TRUE for Differential Clock Input.

TRUE for Weak Driver included.

TRUE for Concurrent Auto Precharge supported.

TRUE for Fast AP supported.

wchar_t bankDensity[VSHORT_STRING_LEN]

Module bank density.

wchar_t moduleHeight[VSHORT_STRING_LEN]

Module height.


The documentation for this struct was generated from the following file:
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